Digital Electronics MCQs - Chapter 9

Dynamic Logic Circuits Multiple Choice Questions (MCQ) PDF - 4

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Dynamic Logic Circuits Questions & Answers PDF Download: MCQ Quiz 4

MCQ 16: During evaluation phase, PMOS is

A) ON

B) OFF

C) −∞

D) ∞

MCQ 17: NMOS conducts at input voltage equals to

A) output voltage

B) dynamic voltage

C) ground

D) threshold voltage

MCQ 18: Approach to solve charge sharing problem is to precharge

A) internal nodes

B) external nodes

C) mid nodes

D) load capacitor

MCQ 19: Output node of dynamic logic circuit is a

A) low-impedance node

B) high-impedance node

C) zero-impedance node

D) infinite-impedance node

MCQ 20: At rising edge of clock, output will make

A) 0-1 transition

B) 1-0 transition

C) z-0 transition

D) z-1 transition

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