Digital Electronics MCQs - Chapter 7

CMOS Logic Gates Circuits MCQ (Multiple Choice Questions) PDF - 6

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CMOS Logic Gates Circuits Questions & Answers PDF Download: MCQ Quiz 6

MCQ 26: Two networks in CMOS logic gates are PDN and

A) DTL

B) RTL

C) PUN

D) PUMP

MCQ 27: In Y=bar(AB), Y is high when

A) A=1, B=1

B) A=0, B=0

C) A=0, B=1

D) A=1, B=0

MCQ 28: Which of the output is easier to synthesize by the PUN?

A) Y

B) bar(Y)

C) Y+1

D) bar(Y)+1

MCQ 29: Y=A+B represents

A) AND gate

B) NOR gate

C) OR gate

D) NOT gate

MCQ 30: System in which Y is only high when inputs A, B and C are high, is represented as

A) Y=bar(ABC)

B) Y=ABC

C) Y=bar(AB)+bar(C)

D) Y=A+B

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