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MCQ 1: In Dynamic logic when clock signal is high, PMOS turned OFF and single NMOS at PDN will
MCQ 2: In precharge phase, when capacitor is fully charge it becomes equal to
MCQ 3: During precharge, PMOS conduct and
MCQ 4: During evaluation phase, PMOS is
MCQ 5: In Dynamic logic when clock signal is low, PMOS turned ON and this phase is termed as
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