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Design With Multiplexers Questions and Answers PDF Download eBook
MCQ: The first level of design with multiplexer determines the registers
- present state
- input
- next state
- output
C
MCQ: 74195 shift registers have
- synchronous clear mode
- asynchronous clear mode
- reset mode
- enable mode
B
MCQ: Down counter decrement the value by
- 1
- 2
- 3
- 4
A
MCQ: Register giving response to pulse duration is called
- latch
- gated latch
- counters
- flip-flop
B
MCQ: To implement the Boolean function with NAND gates we convert the function to
- AND logic
- OR logic
- NOR logic
- NAND logic
D