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Data Level Parallelism and GPU Architecture Multiple Choice Questions and Answers 1 PDF Download

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MCQ on Data Level Parallelism and GPU Architecture Test 1Quiz PDF Download

MCQ: To load and store instructions of vector architectures, unit used is

  1. Explicit unit-stride
  2. Implicit unit-stride
  3. Control synchronization
  4. SIM instructions

A

MCQ: Most essential source of overhead, when gets ignored by chime model is vector

  1. Vector register
  2. Vector element
  3. Vector start-up time
  4. Vector delay time

C

MCQ: Highest bandwidth of memory for moving ridge point in Corei7 from 2.6 to

  1. 0.4
  2. 0.6
  3. 1.5
  4. 3.2

B

MCQ: Median vectorization getting improved from about 70% to about

  1. 75%
  2. 80%
  3. 90%
  4. 100%

C

MCQ: Loops when gets vectored then they do not have dependences among iterations of a loop, which are called

  1. Data dependences
  2. Control dependences
  3. Loop-control dependences
  4. loop-carried dependences

D