Introduction to Memory Hierarchy Design Multiple Choice Questions (MCQ) PDF Download

MCQ 1: The scheme has set, in the cache as a group of blocks, is known as

1. set distributive
2. principle of locality
3. set associative
4. none of above

MCQ 2: IA-32 allows the operating system to maintain the protection level of the

1. rings
2. frames
3. pages
4. routine

MCQ 3: During the execution of DADD R1,R2,R3; DSUB R4,R1,R5; AND R6,R1,R7; OR R8,R1,R9; xOR R10,R1,R11, DSUB instruction reads the value during its ID stage. This problem is called a

1. control hazard
2. structural hazard
3. pipelined
4. data hazard

MCQ 4: New topologies that could reduce the number of switches through which packets must traverse, referred to as the

1. crossbar
2. crossbar switch
3. hop count
4. design

MCQ 5: If the L2 cache is missed and the L3 cache is accessed. For a 4-core i7, which is having 8MB L3, the index size will be

1. 2⁹
2. 2¹³
3. 2¹⁵
4. 2¹⁷