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Practice computer architecture: memory hierarchy MCQ: Per memory reference, miss-rate can be turned into per instruction misses rate by, with choices miss rate= memory accesses/ instructions, miss rate= memory accesses* instructions, miss rate= memory accesses-instructions, and miss rate= memory accesses+ instructions for bachelor's degree in computer science. Practice merit scholarships assessment test, online learning computer architecture memory hierarchy quiz questions for competitive exams in computer science major for online computer science and engineering.

MCQ: Per memory reference, the miss-rate can be turned into the per instruction misses rate by

1. Miss rate= Memory accesses/ instructions
2. Miss rate= Memory accesses* instructions
3. Miss rate= Memory accesses-instructions
4. Miss rate= Memory accesses+ instructions

A

MCQ: When Cycle per instruction is 1.0, data accesses are 50% of the total instructions, and the miss penalty is 25clock-cycles and the miss rate having 2%, then the computer would the faster as,

1. 1.25
2. 1.45
3. 1.75
4. 1.85

C

MCQ: Address spaces are typically broken into the fixed-size blocks, called

1. Registers
2. Stacks
3. Pages
4. Frames

C

MCQ: Processor's performance can be calculated as

1. CPU execution time = (CPU clock cycles - Memory stall cycles) ? Clock cycle time
2. CPU execution time = (CPU clock cycles + Memory stall cycles) ? Clock cycle time
3. CPU execution time = (CPU clock cycles + Memory stall cycles) - Clock cycle time
4. CPU execution time = (CPU clock cycles x Memory stall cycles) + Clock cycle time

B

MCQ: Ratio of cache accesses, results in a miss is known as

1. Hit miss
2. Hit rate
3. File caches
4. Miss rate

D