Case Study Sanyo VPC-Sx500 Camera Multiple Choice Questions (MCQ) PDF Download

MCQ 1: The requesting node sending the requested data starting from the memory, and the requestor which has made the only sharing node, known as

1. write miss
2. write node
3. read miss
4. read node

MCQ 2: A hardware mechanism that aims at reducing the stall cycles resulting from correctly predicted taken branches to zero cycles are known as

1. Branch Target Buffer (BTB)
2. Branch History Buffer (BHB)
3. Sequential control flow
4. Anti-dependence

MCQ 3: Every MIPS instruction can be implemented at most

1. 2 clock cycles
2. 3 clock cycles
3. 4 clock cycles
4. 5 clock cycles

MCQ 4: Every dependence analysis algorithms working on the supposition that array indices are

1. server
2. kernel
3. affine
4. define

MCQ 5: Issue of "How are paths allocated to packets?", addresses the

1. transport
2. routing
3. switching
4. bandwidth