Synchronous Sequential Logics Multiple Choice Questions Test 1 pdf Download

Practice digital logic design test 1 with MCQ on triggering of flipflops online for learning. Practice synchronous sequential logics multiple choice questions (MCQ) on triggering of flipflops, fliplops in synchronous sequential logic, flipflops excitation tables, state reduction and assignment, clocked sequential circuits in dld,. Free study guide has answering options edge triggered, level triggered, clock triggered and pulse triggered of multiple choice questions (MCQ) as flipflops are to test learning skills. Study to learn triggering of flipflops quiz questions to practice MCQ based online exam preparation test.

MCQ on Synchronous Sequential Logics - Test 1

MCQ. Flipflops are

  1. level triggered.
  2. edge triggered.
  3. clock triggered.
  4. pulse triggered.

B

MCQ. One that is not type of flipflop is

  1. JK.
  2. T.
  3. RS.
  4. ST.

D

MCQ. In excitation table of D flipflop next state is equal to

  1. present state.
  2. next state.
  3. input state.
  4. D state.

D

MCQ. Reduction of flip-flops in a sequential circuit is referred to as

  1. reduction.
  2. state reduction.
  3. next state.
  4. both a and b.

B

MCQ. State table can be represented in a

  1. state diagram.
  2. map.
  3. truth table.
  4. graph.

A

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