Practice synchronous sequential logics multiple choice questions (MCQs), digital logic design test 1 for online exams. Practice triggering of flipflops MCQs questions and answers on triggering of flipflops, fliplops in synchronous sequential logic, flipflops excitation tables, state reduction and assignment, clocked sequential circuits in dld with answers. Free synchronous sequential logics quiz, online study guide has helping answer key with choices as t flip-flop with nand gate for slave, rs flip-flop with an inverted clock for slave, positive trigger for slave and none of multiple choice questions as a master-slave combination can be constructed for any type of flip-flops by adding a clocked to test learning skills for viva exam preparation and job's interview questions. Study to learn triggering of flipflops quiz questions with online learning MCQs for competitive exam preparation test.

MCQ. A master-slave combination can be constructed for any type of flip-flops by adding a clocked

1. RS Flip-flop with an inverted clock for slave
2. T flip-flop with NAND gate for slave
3. Positive trigger for slave
4. None

B

MCQ. One that is not the type of flip-flop is

1. JK
2. T
3. RS
4. UT

D

MCQ. In the excitation table of D flip-flop the next state is equal to

1. present state
2. next state
3. input state
4. D state

D

MCQ. The reduction of flip-flops in a sequential circuits are referred as

1. reduction
2. state reduction
3. next state
4. both a and b

B

MCQ. State table can be represented in a

1. state diagram
2. map
3. truth table
4. graph

A