Instruction Level Parallelism Multiple Choice Questions 1 PDF Download

Learn instruction level parallelism multiple choice questions (MCQs), computer architecture test 1 online for exams. Practice exploiting ilp using multiple issue MCQs questions and answers on exploiting ilp using multiple issue, dynamic scheduling algorithm, instruction level parallelism, advanced branch prediction, dynamic scheduling and data hazards with answers. Free instruction level parallelism quiz, online study guide has helping answer key with choices as local scheduling, global scheduling, pre scheduling and post scheduling of multiple choice questions as if exploiting and finding parallelism, across branches require scheduling code, a substantially very difficult algorithm is to test learning skills for viva exam preparation and job's interview questions. Study to learn exploiting ilp using multiple issue quiz questions to practice online MCQs for competitive exam preparation test.

MCQ on Instruction Level Parallelism Quiz PDF Download Test 1

MCQ. If exploiting and finding the parallelism, across branches require scheduling code, a substantially very difficult algorithm is

  1. Global scheduling
  2. Local scheduling
  3. Pre scheduling
  4. Post scheduling

A

MCQ. Having load before the store in a running program order, then interchanging this order, results in a

  1. WAW hazards
  2. Destination registers
  3. WAR hazards
  4. Registers

C

MCQ. When instruction i and instruction j are tends to write the same register or the memory location, it is called

  1. Input dependence
  2. Output dependence
  3. Ideal pipeline
  4. Digital call

B

MCQ. Branch-selected entries in a (2,2) predictor, which is having a total of 8K-bits in the prediction buffer are

  1. 1K
  2. 2K
  3. 3K
  4. 4K

A

MCQ. The 10-bit history is used for allowing patterns of up to

  1. 10 branches
  2. 9 branches
  3. 8 branches
  4. 7 branches

A